98 lines
No EOL
2.7 KiB
HolyC
98 lines
No EOL
2.7 KiB
HolyC
#define PCI_INTH_MAX 16
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U64 @pci_int_handler[PCI_INTH_MAX];
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class @pci_info
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{
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U16 vendor_id;
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U16 device_id;
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U16 command;
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U16 status;
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U32 _class;
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U32 bar[6];
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U32 cap_pointer;
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};
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class @pci_cap
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{
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U8 cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */
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U8 cap_next; /* Generic PCI field: next ptr. */
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U8 cap_len; /* Generic PCI field: capability length */
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U8 cfg_type; /* Identifies the structure. */
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U8 bar; /* Where to find it. */
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U8 padding[3]; /* Pad to full dword. */
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U32 offset; /* Offset within bar. */
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U32 length; /* Length of the structure, in bytes. */
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};
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U0 @get_pci_info(I64 i, @pci_info* pci)
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{
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I64 j;
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pci->vendor_id = PCIReadU32(i.u8[2], i.u8[1], i.u8[0], 0x0) & 0xFFFF;
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pci->device_id = PCIReadU32(i.u8[2], i.u8[1], i.u8[0], 0x0) >> 16;
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pci->command = PCIReadU32(i.u8[2], i.u8[1], i.u8[0], 0x4) & 0xFFFF;
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pci->status = PCIReadU32(i.u8[2], i.u8[1], i.u8[0], 0x4) >> 16;
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pci->_class = PCIReadU32(i.u8[2], i.u8[1], i.u8[0], 0x8) >> 24;
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for (j = 0; j < 6; j++)
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pci->bar[j] = PCIReadU32(i.u8[2], i.u8[1], i.u8[0], 0x10 + (0x04 * j));
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}
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U0 @get_pci_cap(I64 i, @pci_cap* cap, I64 idx)
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{
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I64 base = 0x40 + (idx * 16);
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U32 u32;
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u32 = PCIReadU32(i.u8[2], i.u8[1], i.u8[0], base);
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cap->cap_vndr = u32.u8[0];
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cap->cap_next = u32.u8[1];
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cap->cap_len = u32.u8[2];
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cap->cfg_type = u32.u8[3];
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u32 = PCIReadU32(i.u8[2], i.u8[1], i.u8[0], base + 0x04);
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cap->bar = u32.u8[0];
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cap->offset = PCIReadU32(i.u8[2], i.u8[1], i.u8[0], base + 0x08);
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cap->length = PCIReadU32(i.u8[2], i.u8[1], i.u8[0], base + 0x0c);
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}
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U0 @pci_reroute_interrupts(I64 base, I64 cpu)
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{
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I64 i;
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U8* da = dev.uncached_alias + IOAPIC_REG;
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U32* _d = dev.uncached_alias + IOAPIC_DATA;
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for (i = 0; i < 4; i++) {
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*da = IOREDTAB + i * 2 + 1;
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*_d = dev.mp_apic_ids[cpu] << 24;
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*da = IOREDTAB + i * 2;
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*_d = 0x4000 + base + i;
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}
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}
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I64 @pci_register_int_handler(U64 handler)
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{
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if (!handler)
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return -1;
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I64 i = 0;
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while (@pci_int_handler[i])
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i++;
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if (i > PCI_INTH_MAX - 1)
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return -1;
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@pci_int_handler[i] = handler;
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return 0;
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}
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interrupt U0 @pci_interrupt_handler()
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{
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I64 i;
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for (i = 0; i < PCI_INTH_MAX; i++)
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if (@pci_int_handler[i])
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Call(@pci_int_handler[i]);
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*(dev.uncached_alias + LAPIC_EOI)(U32*) = 0;
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}
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MemSet(&@pci_int_handler, NULL, sizeof(U64) * PCI_INTH_MAX);
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IntEntrySet(0x40, &@pci_interrupt_handler, IDTET_IRQ);
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IntEntrySet(0x41, &@pci_interrupt_handler, IDTET_IRQ);
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IntEntrySet(0x42, &@pci_interrupt_handler, IDTET_IRQ);
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IntEntrySet(0x43, &@pci_interrupt_handler, IDTET_IRQ);
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@pci_reroute_interrupts(0x40, 0);
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"pci "; |